TSV & Wafer Level Packaging
Complete process management
WLP is a rapidly growing field within Semiconductor processing. Using WLP to connect miniaturized structures directly on the wafer, chip manufacturers can save space and reduce overall chip size. WLP involves challenging new processes such as TSV filling, Under Bump Metallization (UBM), Copper Pillars, and Redistribution Layers (RDL) and these require the tightest and most precise control that only ECI's Quali-Fill systems can provide.